The present invention relates generally to metal interconnect formation techniques and more particularly relates to the formation of CVD tungsten contacts in a non pre-metal planarized semiconductor body.
Pre-metal planarization of semiconductor bodies prior to metal contact or filled via formation furnishes to easier implementation of photolithography techniques in the subsequent formation of the contacts. However, the planarization process often leads to a non uniform oxide thickness over the silicon substrate. In some instances the oxide is over etched resulting in excessively thin oxide over some areas of the substrate. This is detrimental when, for example, silicides are deposited over the source, drain and gates of a MOS device. If the oxide is too thin the silicide may be etched away increasing the contact resistance. This is an unacceptable condition in that it degrades transistor performance. Additionally pre-metal planarization adds processing steps which resulting in to additional cost considerations.
Prior art solutions such as deposition of spin on glass (SOG) as a planarization technique leads to smoothing of sharp edges but often does not provide adequate planarization of the surface. However SOG is still preferred to pre-metal planarization because it is easier to implement into the process flow and because it leads to an uniform oxide thickness over the contacts.
Thus a method of preventing over etching of the field oxide during etching of the CVD Tungsten contacts without the cost of employing pre-metal planarization is much needed in the semiconductor art.